What happened to 1T-SRAM?

SRAM cells take 6 transistors per bit. A long time ago, a company called Mosys claimed they could replace this with just 1 transistor, also claiming it was as fast as true SRAM. Not only that, but 2001's GameCube contained mostly this type of memory, 24+3=27 MB out of 43 MB.

In 2006, it resurfaced in the Nintendo WII, this time one source mentions it had 88 MB of 1T-SRAM out of 104, but most mention only 24 MB, like the GameCube's main SRAM. Since then, I can't track this technology's trail anywhere. Has it been used anywhere else?

The idea has resurfaced again in 2016, this time clearly showing it as being a true SRAM, but nothing seems to have come of it. Even though SRAM cells remain a large and expensive part of CPUs, and, as X3D's success shows, a very useful memory even in bulk, where 1T-SRAM appears to have shined.

P.S. I guess this is cross-topic with Electrical Engineering, but I'm also interested in the history of this technology. Where was it first used, where else was it used, any indications on whether the claims of being as fast as true SRAM were simply false, or if something else doomed it?

There is no one Transistor per bit static RAM. What you're talking about is pseudo static RAM. That's ordinary DRAM, but with on chip refresh circuitry. That way usage (like CPU or DMA) does not need to care about refresh. Same way as using a dedicated DRAM controller - which, BTW, was how DRAM usage was originally envisioned, like with Intels early 3222/32/42 devices(p.5-25ff of the 1976 catalogue and especially the more common 8203 (see p.3-288 of the 1983 memory manual) for 64 Ki DRAM and ofc the luxury 8207 (p.3-322), used in many x86 unix systems.

Calling the "1T SRAM" just "ordinary DRAM but with on-chip refresh" is seriously mistaken.

To an ASIC designer (the primary customer for this product) the major problem with DRAM is that it's normally fabricated using quite different process technology from logic. When you design an ASIC, you can include SRAM pretty much as you see fit (within limits on chip size and such, of course). It is logic, so fabricating it on a logic chip poses no difficulty at all. In fact, whoever you're working with to fabricate your ASIC will probably supply a free SRAM macro to help you put whatever amount of SRAM you want wherever you want it on your chip.

But DRAM is normally fabricated using completely different process technology. If your chip needs to include DRAM, you have a few choices. One is embedded DRAM (eDRAM). It lets you combine DRAM and logic on a single chip. But it uses a separate process technology all its own, that's somewhat less efficient for logic. Or it was any way. Nowadays, it has more serious problem. At least the last time I noticed, there was only one fab that still offered it at all, and that's on a 28 nm process, which is quite old (2010 timeframe). In its day, eDRAM did give higher bandwidth and lower latency than normal DRAM.

Now, it's certainly true that MoSys 1T-SRAM is actually DRAM internally. But unlike normal DRAM, it can be used on a logic chip that's fabricated with a normal logic process. And in spite of being DRAM internally, you get latency pretty close to what you'd expect from SRAM, and much lower than you'd expect from DRAM, even eDRAM. But it's somewhat like SRAM in another respect: while it's quite dense compared to SRAM, it has quite strict upper limits on the size of a single block. And that means if you really need a lot of it, you have more decoders and sense amps, which starts to take up more space.

For an ASIC designer, their "1T-SRAM" acts like SRAM, not DRAM, in quite a few respects:

Those are in roughly descending level of importance. And it's not a linear descent either--for a lot of purposes, the ability to embed it on a logic IC outweighs all the others put together.

It differs from SRAM in one extremely important respect: it's much higher density (though not as high as normal DRAM, especially if you need a lot).